دانلود رایگان مقاله یک الگوریتم SIMD کارآمد و قابل حمل برای شارژ / گواهی در ذرات سلول

Abstract

In current computer architectures, data movement (from die to network) is by far the most energy consuming part of an algorithm (View the MathML source on-die to ≈10,000 pJ/word on the network). To increase memory locality at the hardware level and reduce energy consumption related to data movement, future exascale computers tend to use many-core processors on each compute nodes that will have a reduced clock speed to allow for efficient cooling. To compensate for frequency decrease, machine vendors are making use of long SIMD instruction registers that are able to process multiple data with one arithmetic operator in one clock cycle. SIMD register length is expected to double every four years. As a consequence, Particle-In-Cell (PIC) codes will have to achieve good vectorization to fully take advantage of these upcoming architectures. In this paper, we present a new algorithm that allows for efficient and portable SIMD vectorization of current/charge deposition routines that are, along with the field gathering routines, among the most time consuming parts of the PIC algorithm. Our new algorithm uses a particular data structure that takes into account memory alignment constraints and avoids gather/scatter instructions that can significantly affect vectorization performances on current CPUs. The new algorithm was successfully implemented in the 3D skeleton PIC code PICSAR and tested on Haswell Xeon processors (AVX2-256 bits wide data registers). Results show a factor of ×2 to ×2.5 speed-up in double precision for particle shape factor of orders 1–3. The new algorithm can be applied as is on future KNL (Knights Landing) architectures that will include AVX-512 instruction sets with 512 bits register lengths (8 doubles/16 singles).

6. Conclusion and prospects

A new method is presented that allows for efficient vectorization of the standard charge/current deposition routines on current SIMD architectures, leading to efficient deposition algorithms for shape factors of orders 1, 2 and 3. This method uses a new data structure for grid arrays (charge/currents) ensuring data alignment and contiguity in memory which are essential to avoid many gather/scatter operations that can significantly hinder vector performances on modern architectures. The algorithms can be used on current multi-core architectures (with up to AVX2 support) as well as on future many-core Intel KNL processors that will support AVX −512. Further tests on KNL will be performed as the processor becomes available. This work presents deposition routines that are fully portable and only use the $OMP SIMD directives that are provided by OpenMP 4.0. Efficient vectorization of the charge conserving current deposition from Esirkepov is being investigated, and will be detailed in future work.