6. Conclusion
Our proposed architecture CPAMA is a highly configurable processor array targeted for low power, low cost image/video processing devices. In comparison with ADRES, CPAMA has shown better performance in TIFF2BW and comparable performance in IDCT application in terms of energy consumption, throughput and area occupation. We think, this is because it occupies only the necessary hardware for a given application. This is achieved by considering the image processing nature in every development cycle of CPAMA.
In the first and second group of multimedia processing applications (point and local), CPAMA is quite reusable and easily configurable. For these application groups, configuration can be done by just changing the parameters of the array or/and processor program. In consumer electronics, improving time-to-market of a low cost and low power image/video processing chip is a significant goal. Due to re-usability of our design, design and verification cycle of an implementation using CPAMA will be shorter. In addition, we have a toolchain project in its final stages to automatically generate design files of the CPAMA. This toolchain also accelerates the design process. Consequently, we think CPAMA is a good candidate for consumer devices that exploit image/ video processing tasks.