دانلود رایگان مقاله آرایه پردازنده جاسازی شده قابل برنامه ریزی برای برنامه های چند رسانه ای

عنوان فارسی
آرایه پردازنده جاسازی شده قابل برنامه ریزی برای برنامه های چند رسانه ای
عنوان انگلیسی
Customizable embedded processor array for multimedia applications
صفحات مقاله فارسی
0
صفحات مقاله انگلیسی
11
سال انتشار
2018
نشریه
الزویر - Elsevier
فرمت مقاله انگلیسی
PDF
کد محصول
E5652
رشته های مرتبط با این مقاله
فناوری اطلاعات
گرایش های مرتبط با این مقاله
سیستمهای چند رسانه ای
مجله
یکپارچگی، مجله VLSI
دانشگاه
Department of Electronics&Communication Engineering - Istanbul Technical University - Turkey
کلمات کلیدی
آرایه پردازنده قابل برنامه ریزی، دستورالعمل انعطاف پذیر، سخت افزار پردازش تصویر، دامنه محاسبات خاص
چکیده

ABSTRACT


We are proposing a Customizable Embedded Processor Array for Multimedia Applications (CPAMA). This architecture can be used as a standalone image/video processing chip in consumer electronics. Its building blocks are all designed to achieve low power and low area, thus it is a good candidate for low cost consumer electronics. Our contribution is, designing a configurable embedded multimedia processor array considering the nature of image/video processing applications. This approach is considered in all the basic blocks of the architecture. Because of its configurable architecture and ability to connect with other devices, it may be used in a large domain of applications. Our architecture is purely implemented with VHDL. It is not dependent on any technology or design software. We have implemented our architecture for different applications on a Xilinx Virtex-5 device and as a number of Application Specific Integrated Circuits (ASIC) by using 90 nm CMOS technology. Experimental case studies show that CPAMA has better or comparable results to the existing similar architectures in terms of performance and energy consumption. Our studies show that throughput of CPAMA is 0.3x–2.4x times better than ADRES. Energy consumption of CPAMA is 31–50% less than ADRES. On the other hand, in one configuration of IDCT application, CPAMA provides 56% less throughput and consumes 55% more energy than ADRES.

نتیجه گیری

6. Conclusion


Our proposed architecture CPAMA is a highly configurable processor array targeted for low power, low cost image/video processing devices. In comparison with ADRES, CPAMA has shown better performance in TIFF2BW and comparable performance in IDCT application in terms of energy consumption, throughput and area occupation. We think, this is because it occupies only the necessary hardware for a given application. This is achieved by considering the image processing nature in every development cycle of CPAMA.


In the first and second group of multimedia processing applications (point and local), CPAMA is quite reusable and easily configurable. For these application groups, configuration can be done by just changing the parameters of the array or/and processor program. In consumer electronics, improving time-to-market of a low cost and low power image/video processing chip is a significant goal. Due to re-usability of our design, design and verification cycle of an implementation using CPAMA will be shorter. In addition, we have a toolchain project in its final stages to automatically generate design files of the CPAMA. This toolchain also accelerates the design process. Consequently, we think CPAMA is a good candidate for consumer devices that exploit image/ video processing tasks.


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