- مبلغ: ۸۶,۰۰۰ تومان
- مبلغ: ۹۱,۰۰۰ تومان
The paper addresses state estimation for clock synchronization in the presence of factors affecting the quality of synchronization. Examples are temperature variations and delay asymmetry. These working conditions make synchronization a challenging problem in many wireless environments, such as Wireless Sensor Networks or WiFi. Dynamic state estimation is investigated as it is essential to overcome non-stationary noises. The two-way timing message exchange synchronization protocol has been taken as a reference. No a-priori assumptions are made on the stochastic environments and no temperature measurement is executed. The algorithms are unequivocally specified offline, without the need of tuning some parameters in dependence of the working conditions. The presented approach reveals to be robust to a large set of temperature variations, different delay distributions and levels of asymmetry in the transmission path
11. Conclusions and future work
We have examined and discussed a neural estimation technique for the popular two-way timing message exchange synchronization protocol and for nodes affected by temperature variations and delay asymmetry. The impacts of the delay knowledge and the presence of several hops in the network have been accurately analyzed. Numerical analysis reveals significant performance improvements over existing techniques (splines and ) under variable temperatures and different delay distributions. One of the most important outcomes is the robustness to increasing synchronization steps (high accuracy, independently to the number of timestamps used). Future work includes different topics. The skew estimation and the robustness to loss of timestamps are currently under investigation. Other intriguing issues are: exploiting temperature observations, runtime retraining of the neural estimator, as well as the management of the multi-hop database under “big data” paradigms. Preliminary results on a real implementation  con- firm the effectiveness of the proposed technique. A more in-depth validation on a number of real installations and environmental conditions is argument of future research as well. Acknowledgment Computational resources were provided by HPC@POLITO, a project of Academic Computing within the Department of Control and Computer Engineering at the Politecnico di Torino (http: //www.hpc.polito.it). Appendix A An example for explaining the measurement Eqs. (8)–(10) of Subsection 3.4 has been reported in Fig. A.10. The index k has been removed for the sake of simplicity and because only one message exchange is analyzed. The quantity CR is the free-running clock Fig. A.10. Example of application of the measurement equations. 14 M. Mongelli, S. Scanzio / Ad Hoc Networks 49 (2016) 1–16 register of the receiver node, which holds the reference time. Instead, CS (i.e., the free-running clock register of the sender node) is updated with a lower frequency than CR. The timestamps exploited for synchronization are: t1 = 3, t2 = 8, t3 = 10, t4 = 6.2. The value γ has been initialized with the estimation of the skew performed in the previous k − 1 synchronization step (i.e., γˆ = −0.25).