- مبلغ: ۸۶,۰۰۰ تومان
- مبلغ: ۹۱,۰۰۰ تومان
The primary function of a differential amplifier is to produce an output signal that is a linearly amplified version of the normally small difference between two input signals, while rejecting the larger part of the two input signals that are common to both of them. The extent to which it is able to do this successfully is quantified by the ‘Common-Mode- Rejection-Ratio’ (CMRR), an important parameter in differential amplifiers for many applications, particularly in medical instrumentation . The most commonly encountered common-mode voltage is line or mains interference, at 50Hz or 60Hz. However, with increasing use of switched-mode power supplies and other higher frequency generators, good CMRR at higher frequencies is becoming more important to reduce the amplitude of high frequency common-mode signals in precision instrumentation applications. There have been many improvements to the classical differential pair amplifier [2-4] that improve the CMRR. However, almost all increasing the low frequency CMRR by reducing the common-mode gain, but little has been published to date to address the need for higher CMRR bandwidth performance. This paper outlines a circuit technique that specifically addresses this issue by reducing the tail sink-current capacitance significantly, resulting in a substantial increase in the CMRR bandwidth. Simulation results for an exemplary MOSFET source- coupled differential design, illustrate the advantage of the technique. It produces a four-fold CMRR bandwidth improvement.